ONE BOM LIMITED(香港)營運 · 深圳 · 香港 · 美國多地辦事處工作時間內 2 小時回覆(UTC+8)每批次出貨前檢測T/T / PayPal / L/C,首單支援擔保交易

JK flip-flops — 在售料號

截至 2026年9月18日,TI-ADI(ONE BOM LIMITED)有 JK flip-flops 在售料號 223 個,其中 0 個 7 天內可發。

料號廠商封裝交期
CD74ACT109M96
Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset
Texas Instruments16-SOIC (D)
CD4027BM96
CMOS Dual J-K Master-Slave Flip-Flop
Texas Instruments16-SOIC (D)
CD4027BM96E4
CMOS Dual J-K Master-Slave Flip-Flop
Texas Instruments16-SOIC (D)
SN74HC109DR
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset
Texas Instruments16-SOIC (D)
CD74ACT109M96E4
Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset
Texas Instruments16-SOIC (D)
CD74HCT73EE4
High speed CMOS logic dual negative-edge-triggered J-K flip-flops with reset
Texas Instruments14-PDIP (N)
SN74LS73ADR
Dual J-K Flip-Flops with Clear
Texas Instruments14-SOIC (D)
SN54LS73AJ
Dual J-K Flip-Flops With Clear and 3-state Outputs
Texas Instruments14-CDIP (J)
CD74HC107M96
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset
Texas Instruments14-SOIC (D)
CD74HC73M96
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset
Texas Instruments14-SOIC (D)
SN74HC112D
Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset
Texas Instruments16-SOIC (D)
CD74AC112M96
Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset
Texas Instruments16-SOIC (D)
CD74HC107M
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset
Texas Instruments14-SOIC (D)
SN74LVC112ADR
Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset
Texas Instruments16-SOIC (D)
CD4027BPWR
CMOS Dual J-K Master-Slave Flip-Flop
Texas Instruments16-TSSOP (PW)
CD74HC73MT
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset
Texas Instruments14-SOIC (D)
CD4027BNSRG4
CMOS Dual J-K Master-Slave Flip-Flop
Texas Instruments16-SO (NS)
CD4027BNSR
CMOS Dual J-K Master-Slave Flip-Flop
Texas Instruments16-SO (NS)
SN74HC112N
Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset
Texas Instruments16-PDIP (N)
SN74LS73AD
Dual J-K Flip-Flops with Clear
Texas Instruments14-SOIC (D)
CD74HCT73E
High speed CMOS logic dual negative-edge-triggered J-K flip-flops with reset
Texas Instruments14-PDIP (N)
CD74HCT109M
High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset
Texas Instruments16-SOIC (D)
CD74HC109M
High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset
Texas Instruments16-SOIC (D)
CD74ACT112M96
Dual Negative-Edge Triggered J-K Flip-Flops with Set and Reset
Texas Instruments16-SOIC (D)
SN74LVC112ADGVR
Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset
Texas Instruments16-TVSOP (DGV)
CD74HCT73M96
High speed CMOS logic dual negative-edge-triggered J-K flip-flops with reset
Texas Instruments14-SOIC (D)
CD74HC73EE4
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset
Texas Instruments14-PDIP (N)
SN74LS112ADRE4
Dual J-K Negative-Edge-Triggered Flip-Flops With Clear And Preset
Texas Instruments16-SOIC (D)
5962-9675101QCA
Dual J-K Flip-Flops With Clear and 3-state Outputs
Texas Instruments14-CDIP (J)
SNJ54LS73AJ
Dual J-K Flip-Flops With Clear and 3-state Outputs
Texas Instruments14-CDIP (J)
CD74HC112PWR
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset
Texas Instruments16-TSSOP (PW)
SNJ54LS112AJ
Dual J-K Negative-Edge-Triggered Flip-Flops With Preset And Clear
Texas Instruments16-CDIP (J)
CD74AC112M
Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset
Texas Instruments16-SOIC (D)
CD74HC112M96
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset
Texas Instruments16-SOIC (D)
CD74HC107M96E4
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset
Texas Instruments14-SOIC (D)
CD4027BF
CMOS Dual J-K Master-Slave Flip-Flop
Texas Instruments16-CDIP (J)
SN74F112DR
Dual J-K Negative-Edge-Triggered Flip-Flop With Clear And Preset
Texas Instruments16-SOIC (D)
SN74LS112ADR
Dual J-K Negative-Edge-Triggered Flip-Flops With Clear And Preset
Texas Instruments16-SOIC (D)
SN74LS109AN
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset
Texas Instruments16-PDIP (N)
SN74LS109ANE4
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset
Texas Instruments16-PDIP (N)
SN54ALS112AJ
Dual J-K Negative-Edge-Triggered Flip-Flops With Clear And Preset
Texas Instruments16-CDIP (J)
CD4027BM
CMOS Dual J-K Master-Slave Flip-Flop
Texas Instruments16-SOIC (D)
CD4027BE
CMOS Dual J-K Master-Slave Flip-Flop
Texas Instruments16-PDIP (N)
CD4027BEE4
CMOS Dual J-K Master-Slave Flip-Flop
Texas Instruments16-PDIP (N)
SN74HC112DR
Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset
Texas Instruments16-SOIC (D)
SN74HC109DRG4
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset
Texas Instruments16-SOIC (D)
CD74HCT109M96
High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset
Texas Instruments16-SOIC (D)
SN74LVC112ANSR
Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset
Texas Instruments16-SO (NS)
SN74HC109NSR
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset
Texas Instruments16-SOP (NS)
CD54HC73F
High Speed CMOS Logic Dual Negative-Edge Trigger J-K Flip-Flops with Reset
Texas Instruments14-CDIP (J)

該分類涉及廠商

品控流程(對標行業標準)

  1. 來源核驗供貨方資質、批次來源宣告、原廠 / 代理鏈路留檔 (AS6081)
  2. 入庫外觀檢查標識、引腳共面、氧化、翻新痕跡 (IDEA-STD-1010-B)
  3. X-Raydie、bond wire、空洞與標準樣品對比 (AS6171/4)
  4. 開蓋 / 溶劑測試抽樣開蓋看 die 標識;丙酮擦拭絲印 (IDEA-STD-1010-B)
  5. 功能 / 電性測試關鍵引數上機或送第三方實驗室 (AS6171/6)
  6. 溼敏與包裝MSL 等級、真空袋、乾燥劑、溼度卡 (JEDEC J-STD-020 / J-STD-033)
  7. 出貨報告每批附檢測照片與報告編號 (ISO 9001:2015)

詢價之後會發生什麼

  1. 1. 工作時間內 2 小時首次回覆(UTC+8)
  2. 2. 報價含單價、交期、批次與貿易條款
  3. 3. T/T / PayPal / L/C 或擔保交易
  4. 4. 發貨前傳送檢測照片
  5. 5. 30 天品質保證與退換

如何採購:付款方式、貿易條款與 30 天質保